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Strona główna

Computer and network architecture

General data

Course ID: 1000-212bAKS
Erasmus code / ISCED: 11.301 The subject classification code consists of three to five digits, where the first three represent the classification of the discipline according to the Discipline code list applicable to the Socrates/Erasmus program, the fourth (usually 0) - possible further specification of discipline information, the fifth - the degree of subject determined based on the year of study for which the subject is intended. / (0612) Database and network design and administration The ISCED (International Standard Classification of Education) code has been designed by UNESCO.
Course title: Computer and network architecture
Name in Polish: Architektura komputerów i sieci
Organizational unit: Faculty of Mathematics, Informatics, and Mechanics
Course groups:
ECTS credit allocation (and other scores): (not available) Basic information on ECTS credits allocation principles:
  • the annual hourly workload of the student’s work required to achieve the expected learning outcomes for a given stage is 1500-1800h, corresponding to 60 ECTS;
  • the student’s weekly hourly workload is 45 h;
  • 1 ECTS point corresponds to 25-30 hours of student work needed to achieve the assumed learning outcomes;
  • weekly student workload necessary to achieve the assumed learning outcomes allows to obtain 1.5 ECTS;
  • work required to pass the course, which has been assigned 3 ECTS, constitutes 10% of the semester student load.

view allocation of credits
Language: Polish
Type of course:

obligatory courses

Requirements:

Introductory programming 1000-211bWPI

Short description:

The lecture is on architecture, organization and working principles of contemporary computers and computer networks.

Full description:

* Principles of digital circuits

** Binary signal

** Basic logical gates: AND, OR, NOT, NAND, NOR, EX-OR, EX-NOR

** Auxiliary digital circuits: transmission gate, tristate gate

** Combinatorial circuits

** Examples of combinatorial circuits: adder, multiplexer, demultiplexer

** Sequential circuits

** Examples of sequential circuits: RS flip-flop, D flip-flop

** Technology limitations: fan-in, fan-out, delay time, noise margin,

dependency of power consumption on switching frequency

** Moore's Law

** Electrostatic Sensitive Devices

* Computer architecture

** von Neumann's model

** Harvard and Princeton architecture

** Multiprocessor and multicore architectures

** Data coding: integers, fractions, strings

** Byte order

* Microprocessor

** Registers

** Instruction list

** Addressing modes

** Instruction cycle, machine cycle, clock cycle

** Pipelining

** Parallel execution: superscalar and vector architecture, VLIW

** CISC vs. RISC

** Protection levels

** Interrupts, exceptions

** Segmentation, paging

** Input-output handling

** DMA

* Memory

** Hierarchical memory

** Semiconductor non-volatile memory: ROM, PROM, EPROM, EEPROM, FLASH

** Semiconductor RAM: static SRAM, dynamic DRAM, asynchronous, synchronous

(SDRAM, DDR-RAM)

** Cache memory

** Magnetic disk

** Optical disk

** Magneto-optical disk (MOD)

** RAID

** SAN (Storage Area Network)

* Buses and interfaces (dependent on remaining time)

** System buses: PCI, PCI Express

** Disk interfaces: SCSI, iSCSI, Serial SCSI, ATA, SATA

** Serial: USB, FireWire, iLink, IEEE-1394, Fibre Channel, DVI, HDMI

* Architecture examples

** CISC: e.g. x86, IA-32, x86-64, IA-64

** RISC: e.g. PowerPC, Cray X1E

** Specialized processors: GPU, DSP, microcontroller

* Computer networks

** Layer model - theory and practice - physical layer

** Bit coding

** Physical media characteristic: multi-mode and single-mode waveguide, coaxial

cable, twisted pair

Bibliography:

* W. Stallings, Computer Organization and Architecture

* D.A. Patterson, J.L. Hennessy, Computer Organization and Design

Learning outcomes: (in Polish)

Wiedza

1. Ma podstawową wiedzę na temat architektury współczesnych systemów (logika układów cyfrowych i reprezentacja danych, architektura procesora, wejście-wyjście, pamięć, architektury wieloprocesorowe) (K_W06).

Umiejętności

1. Rozumie niskopoziomowe zasady wykonywania programów (K_U08).

2. Potrafi wyjaśnić, na czym polega zarządzanie pamięcią, co to jest hierarchia pamięci, co to jest pamięć wirtualna (K_U12).

3. Posługuje się przyjętymi formatami reprezentacji różnego rodzaju danych (liczby, tablice, struktury, tekst), pamiętając o ich ograniczeniach, np. związanych z arytmetyką komputera.

Assessment methods and assessment criteria: (in Polish)

Egzamin pisemny składający się z kilkunastu otwartych pytań lub małych zadań. Każde pytanie lub zadanie jest oceniane w skali od 1 do 5 punktów. Łącznie do zdobycia jest 30 punktów.

This course is not currently offered.
Course descriptions are protected by copyright.
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00-927 Warszawa
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