Programmable logic devices

General data

Course ID:	1000-2M10PUL
Erasmus code / ISCED:	11.3 Kod klasyfikacyjny przedmiotu składa się z trzech do pięciu cyfr, przy czym trzy pierwsze oznaczają klasyfikację dziedziny wg. Listy kodów dziedzin obowiązującej w programie Socrates/Erasmus, czwarta (dotąd na ogół 0) – ewentualne uszczegółowienie informacji o dyscyplinie, piąta – stopień zaawansowania przedmiotu ustalony na podstawie roku studiów, dla którego przedmiot jest przeznaczony. / (0612) Database and network design and administration The ISCED (International Standard Classification of Education) code has been designed by UNESCO.
Course title:	Programmable logic devices
Name in Polish:	Programowalne układy logiczne
Organizational unit:	Faculty of Mathematics, Informatics, and Mechanics
Course groups:	(in Polish) Przedmioty obieralne na studiach drugiego stopnia na kierunku bioinformatyka Elective courses for Computer Science
Course homepage:	https://www.mimuw.edu.pl/~mwk/pul/
ECTS credit allocation (and other scores):	(not available) Basic information on ECTS credits allocation principles: the annual hourly workload of the student’s work required to achieve the expected learning outcomes for a given stage is 1500-1800h, corresponding to 60 ECTS; the student’s weekly hourly workload is 45 h; 1 ECTS point corresponds to 25-30 hours of student work needed to achieve the assumed learning outcomes; weekly student workload necessary to achieve the assumed learning outcomes allows to obtain 1.5 ECTS; work required to pass the course, which has been assigned 3 ECTS, constitutes 10% of the semester student load. view allocation of credits
Language:	English
Type of course:	elective monographs
Short description:	The course will focus on basics of digital circuits design using programmable logic devices (FPGA and CPLD). Hardware Description Languages, the architecture of the programmable logic devices, design techniques, development and testing tools will be presented during the lectures. Practical skills will be developed during labs with hands-on exercises on real hardware.
Full description:	Program 1. Introduction to programmable logic technology and its applications 2. Basic digital circuit components --- logic states, gates, flip-flops 3. Architecture of programmable logic chips 4. Hardware Description Languages 5. Emulating and testing 6. Combinatorial circuits 7. Sequential circuits 8. State machine 9. Counters, frequency dividers, shift registers 10. Serial interfaces 11. Component libraries 12. Custom microprocessors 13. Interfaces between micorprocessors and peripherials 14. Stability issues and clock synchronization
Bibliography:	1. Bob Zeidman, Designing with FPGAs and CPLDs, CMP Books, 2002. 2. Pong P. Chu, FPGA Prototyping by VHDL Examples, Wiley, 2008.
Learning outcomes:	(in Polish) Wiedza 1. Ma podstawową wiedzę na temat układów logicznych kombinacyjnych i sekwencyjnych. Umiejętności 1. Potrafi stworzyć opis układu logicznego w języku opisu sprzętu, zasymulować go, oraz uruchomić go na programowalnym układzie logicznym.
Assessment methods and assessment criteria:	Implementing of five small projects in a simulator and on an FPGA, each assessed on a scale from 0 to 1 point. A final assessment is based on the sum of points obtained.

This course is not currently offered.

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Copyright by University of Warsaw.